A process for forming a pattern electrically-conductive layer on a wafer may include a dry etching process and a wet etching process.
As electronics are gradually miniaturized and large-scaled, semiconductors having high integration are needed. To form a highly integrated pattern on a substrate, film uniformity has to be improved, as well as, a pattern having a high aspect ratio in a thickness direction is needed.
To improve integration on a plane, a material having high conductivity such as copper and gold as materials for a line has to be used with a thin thickness and has film uniformity to form a layer having a thin thickness. In case of the wet process, in order to improve the film uniformity, a chemical material has to be constantly maintained in concentration. In case of the conventional wet process, it is difficult to uniformly maintain the concentration of the chemical material.
Also, the method for improving only the integration on the plane meets with limitation. Thus, a through silicon via (TSV) method in which a vertically electrical connection part is formed in a chip has been disclosed as one of 3D packaging methods for stacking a plurality of chips on one package. To utilize the TSV method, unlike a method for simply forming a circuit on a semiconductor surface, a process for filling a conductor in a via hole that is narrowly lengthily formed in a thickness direction is needed. Particularly, a process for forming a conductor, an insulation layer, and a barrier layer in the narrow and long via hole may cause many problems.
In case of the drying process, when compared to the wet process, it is difficult to uniformly form the conductor in the via hole that is narrowly lengthily formed at a high aspect ratio.
In case of the wet process, a process in which a cleaning process is performed after a surface of a wafer is disposed downward to face a tank containing a chemical material and then react has been generally known. However, this process has problems in which a large amount of chemical material is wastefully consumed, a rear surface of the wafer is contaminated, and the wafer moves by a separate device to clean the chemical material in a state where the surface of the wafer is coated with the chemical material.
As described above, to highly integrate the semiconductor pattern on the wafer, development of an apparatus for manufacturing a semiconductor wafer, which is capable of realizing a pattern having a high aspect ratio, is urgent.